IL2452 System Design Languages
KTH Royal Institute of Technology
120 university credits (hp) in engineering or natural sciences and documented proficiency in English corresponding to English A.
- Review of C++ basics from the SystemC perspective
- SystemC concepts: Processes, Modules, Ports, Interfaces, Channels, and SystemC data types
- SystemC simulation kernel
- TLM concepts, interfaces, channels and modeling examples
- ForSyDe methodology
After completing the course, the student shall be able to
- explain the key concepts proposed for system-level modeling in SystemC and how C++ features are utilized in implementing these concepts
- model systems (both hardware and software) in SystemC
- explain and compare the fundamental modeling mechanisms in SystemC and other digital design languages such as VHDL and Verilog
- master the key transaction level modeling (TLM) concepts and write own models following TLM standards for high-level fast simulation
- contrast different approaches for system-level design
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